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HAF2021(L), HAF2021(S)
Silicon N Channel MOS FET Series Power Switching
REJ03G0179-0200Z (Previous ADE-208-1459A(Z)) Rev.2.00 Mar.05.2004
Description
This FET has the over temperature shut-down capability sensing to the junction temperature. This FET has the built-in over temperature shut-down circuit in the gate area. And this circuit operation to shut-down the gate voltage in case of high junction temperature like applying over power consumption, over current etc.
Features
* * * * Logic level operation (6 V Gate drive) High endurance capability against to the short circuit Built-in the over temperature shut-down circuit Latch type shut-down operation (Need 0 voltage recovery)
Outline
LDPAK
D
4 G
4
Gate resistor
Temperature Sensing Circuit
Latch Circuit
Gate Shut-down Circuit
1 1
2
1. Gate 2. Drain 3. Source 4. Drain
3
2
3
S
Rev.2.00, Mar.05.2004, page 1 of 8
HAF2021(L), HAF2021(S)
Absolute Maximum Ratings
(Ta = 25C) Item Drain to source voltage Gate to source voltage Gate to source voltage Drain current Drain peak current Body-drain diode reverse drain current Channel dissipation Channel temperature Storage temperature Notes: 1. PW 10s, duty cycle 1 % 2. Value at Ta = 25C Symbol VDSS VGSS VGSS ID ID(pulse)Note1 IDR Pch Note2 Tch Tstg Ratings 60 16 -2.5 50 100 50 100 150 -55 to +150 Unit V V V A A A W C C
Typical Operation Characteristics
Item Input voltage Input current (Gate non shut down) Input current (Gate shut down) Shut down temperature Gate operation voltage Symbol VIH VIL IIH1 IIH2 IIL IIH(sd)1 IIH(sd)2 Tsd VOP Min 3.5 -- -- -- -- -- -- -- 3.5 Typ -- -- -- -- -- 0.6 0.35 175 -- Max -- 1.2 100 50 1 -- -- -- 12 Unit V V A A A mA mA C V Test Conditions
Vi = 6 V, VDS = 0 Vi = 3.5 V, VDS = 0 Vi = 1.2 V, VDS = 0 Vi = 6 V, VDS = 0 Vi = 3.5 V, VDS = 0 Channel temperature
Rev.2.00, Mar.05.2004, page 2 of 8
HAF2021(L), HAF2021(S)
Electrical Characteristics
(Ta = 25C) Item Drain current Drain current Drain to source breakdown voltage Gate to source breakdown voltage Gate to source breakdown voltage Gate to source leak current Symbol ID1 ID2 V(BR)DSS V(BR)GSS V(BR)GSS IGSS1 IGSS2 IGSS3 IGSS4 IGS(op)1 IGS(op)2 IDSS VGS(off) |yfs| RDS(on) RDS(on) Coss td(on) tr td(off) tf VDF trr tos Min 90 -- 60 16 -2.5 -- -- -- -- -- -- -- 2.2 15 -- -- -- -- -- -- -- -- -- -- Typ -- -- -- -- -- -- -- -- -- 0.6 0.35 -- -- 50 8 9.5 1450 20 75 3 2.6 0.9 110 0.8 Max -- 10 -- -- -- 100 50 1 -100 -- -- 10 3.4 -- 12 15 -- -- -- -- -- -- -- -- Unit A mA V V V A A A A mA mA A V S m m pF s s s s V ns ms Test Conditions VGS = 6 V, VDS = 10 V VGS = 1.2 V, VDS = 10 V ID = 10 mA, VGS = 0 IG = 300 A, VDS = 0 IG = -100 A, VDS = 0 VGS = 6 V, VDS = 0 VGS = 3.5 V, VDS = 0 VGS = 1.2 V, VDS = 0 VGS = -2.4 V, VDS = 0 VGS = 6 V, VDS = 0 VGS = 3.5 V, VDS = 0 VDS = 60 V, VGS = 0 ID = 1 mA, VDS = 10 V ID = 25 A, VDS = 10 V Note3 ID = 25 A, VGS = 10 V Note3 ID = 25 A, VGS = 6 V Note3 VDS = 10 V , VGS = 0, f = 1 MHz ID = 25 A, VGS = 10 V RL = 1.2
Input current (shut down) Zero gate voltage drain current Gate to source cutoff voltage Forward transfer admittance Static drain to source on state resistance Static drain to source on state resistance Output capacitance Turn-on delay time Rise time Turn-off delay time Fall time Body-drain diode forward voltage Body-drain diode reverse recovery time Over load shut down operation time Note4
IF = 50 A, VGS = 0 IF = 50 A, VGS = 0 diF/ dt =50 A/s VGS = 6 V, VDD = 16 V
Notes: 3. Pulse test 4. Including the junction temperature rise of the over loaded condition.
Rev.2.00, Mar.05.2004, page 3 of 8
HAF2021(L), HAF2021(S)
Main Characteristics
Power vs. Temperature Derating 200
Pch (W) (A)
500 200
Maximum Safe Operation Area Thermal shut down Operation Area
10
150
100 50 20 10 5 2 is limited by R DS(on) 1 0.5 Ta = 25C 0.3
Operation in this area
0
Drain Current ID
Channel Dissipation
DC
PW
1
s
m
100
Op
=
s
er
at
10
ion
m
s
(T
c=
50
25
C )
0
50
100
150 Tc (C)
200
Case Temperature 100
0.5 1 2 5 10 20 50 100 Drain to Source Voltage VDS (V) Typical Transfer Characteristics
Typical Output Characteristics 10 V 8V 6V
(A)
Pulse Test
50 VDS = 10 V Pulse Test 40
(A) Drain Current ID
80
Drain Current ID
60
30 Tc = -25C 25C 75C 10
40
20
20 4V
VGS = 3.5 V
0
2 4 6 Drain to Source Voltage
8 10 VDS (V)
0
2 4 6 Gate to Source Voltage VGS (V)
8
Drain to Source On State Resistance RDS(on) (m)
Drain to Source Saturation Voltage vs. Gate to Source Voltage
Drain to Source Saturation Voltage VDS(on) (V)
Static Drain to Source State Resistance vs. Drain Current 50
0.8
Pulse Test
0.6 ID = 50 A 0.4 25 A 0.2 10 A
20 10 5 VGS = 6 V VGS = 10 V
2 Pulse Test 1 1 2 5 10 20 Drain Current ID 50 100 200 (A)
0
2
4
6
8 VGS (V)
10
Gate to Source Voltage
Rev.2.00, Mar.05.2004, page 4 of 8
HAF2021(L), HAF2021(S)
Static Drain to Source State Resistance vs. Temperature
Forward Transfer Admittance |yfs| (S)
Drain to Source On State Resistance RDS(on) (m)
Forward Transfer Admittance vs. Drain Current 100 VDS = 10 V 50 Pulse Test 20 10 5 2 1 0.5 0.2 0.1 0.1 0.5 1 5 10 Drain Current ID (A) 50 100 75C 25C Tc = -25C
25 Pulse Test 20 25 A, 10 A 15 VGS = 6 V ID = 50 A ID = 50 A 25 A, 10 A 5 0 -25 VGS = 10 V
10
0
25 50 75 100 125 150 Case Temperature Tc (C)
1000
Reverse Recovery Time trr (ns)
Body to Drain Diode Reverse Recovery Time di / dt = 50 A / s VGS = 0, Ta = 25C
Switching Time t (s)
1000
Switching Characteristics
500
500 VGS = 10 V, VDD = 30 V PW = 300 s, duty < 1 % 200 100 50 20 10 5 2 td(on) td(off) tf 5 10 Drain Current 50 100 ID (A) 500 tr
200 100 50
20 10 1 2 5 10 20 50 100 Reverse Drain Current IDR (A) Reverse Drain Current vs. Source to Drain Voltage Pulse Test 40
Capacitance C (pF)
1 0.5 1
50
Reverse Drain Current IDR (A)
10000
Typical Capacitance vs. Drain to Source Voltage
1000
Coss
30 0, -5 V VGS = 5 V 10
20
100 VGS = 0 f = 1 MHz 10
0
0.4
0.8
1.2
1.6 VSD
2.0 (V)
0
Source to Drain Voltage
10 20 30 40 50 Drain to Source Voltage VDS (V)
Rev.2.00, Mar.05.2004, page 5 of 8
HAF2021(L), HAF2021(S)
Gate to Source Voltage vs. Shutdown Time of Load-Short Test
(V)
Shutdown Case Temperature vs. Gate to Source Voltage 200
Shutdown Case Temperature Tc (C)
12 10 8 6 4 2 0 0.0001 V DD= 16 V
VGS
180
Gate to Source Voltage
160
140
120 100 0
I D= 5 A
0.001
0.01
0.1 Pw (S)
2
4
6
8 VGS (V)
10
Shutdown Time of Load-Short Test
Gate to Source Voltage
Normalized Transient Thermal Impedance vs. Pulse Width
Normalized Transient Thermal Impedance s (t)
3 Tc = 25C 1 D=1 0.3
0.5
0.2
0.1
0.1
0.02 1 0.0
1s t ho pu
ch- c(t) = s (t) * ch- c ch- c = 1.25C/W, Tc = 25C
PDM
D=
PW T
0.03
PW T
lse
0.01 10
100
1m
10 m Pulse Width PW (S)
100 m
1
10
Switching Time Test Circuit Vin Monitor D.U.T. RL Vin 50 10 V V DD = 30 V Vin Vout 10% 10% Vout Monitor
Waveform 90%
10% 90% td(off) tf
90% td(on) tr
Rev.2.00, Mar.05.2004, page 6 of 8
HAF2021(L), HAF2021(S)
Package Dimensions
As of January, 2003
Unit: mm
(1.4)
4.44 0.2 10.2 0.3 1.3 0.15
11.3 0.5 0.3 10.0 + 0.5 -
8.6 0.3
1.3 0.2 1.37 0.2
0.76 0.1 2.54 0.5 2.54 0.5
11.0 0.5
0.2 0.86 + 0.1 -
2.49 0.2
0.4 0.1
Package Code JEDEC JEITA Mass (reference value)
LDPAK (L) -- -- 1.40 g
As of January, 2003
Unit: mm
4.44 0.2 10.2 0.3
(1.4)
8.6 0.3
+ 0.3 - 0.5
10.0
(1.5)
(1.5)
2.49 0.2 0.2 0.1 + 0.1 -
7.8 7.0
2.2
1.37 0.2
0.3 3.0 + 0.5 -
1.3 0.2 2.54 0.5
0.2 0.86 + 0.1 -
0.4 0.1
2.54 0.5
Package Code JEDEC JEITA Mass (reference value)
LDPAK (S)-(1) -- -- 1.30 g
Rev.2.00, Mar.05.2004, page 7 of 8
1.7
1.3 0.15
7.8 6.6
HAF2021(L), HAF2021(S)
Ordering Information
Part Name HAF2021-90L HAF2021-90S HAF2021-90STL HAF2021-90STR Quantity Max:50pcs/sack Max:50pcs/sack 1000pcs/Reel 1000pcs/Reel Shipping Container sack sack Embossed tape Embossed tape
Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product.
Rev.2.00, Mar.05.2004, page 8 of 8
Sales Strategic Planning Div.
Keep safety first in your circuit designs!
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein.
RENESAS SALES OFFICES
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http://www.renesas.com
(c) 2004. Renesas Technology Corp., All rights reserved. Printed in Japan.
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